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lapis semiconducto r fedl9270-01 issue date: sep. 1, 2005 ml9270-xx 33-segment vfd driver 1/13 general description the ml9270-xx is a monolithic ic designed for directly driving the anode of the vacuum fluorescent display tube. the device contains a 34-bit shift register circuit, 33-bit latch circuit, pla (33*33 matrix) and 33-output circuit on a single chip. display data is serially stored in the shift register at the rising edge of a clock pulse. setting the blank_bar pin low allows all the driver outputs to be driven low, which makes it possible to set the display blanking. features ? logic power supply (v dd ) : 3.3 v ? 10% or 5.0 v ? 10% ? vfd tube drive power supply (v disp ) : 8 to 18 v ? vfd driver output can be connected directly to the vfd tube. no pull-down resistor is required. ? vfd driver output current segment driver (output1 to 13) : ?6.0 ma (v disp = 9.5v) segment driver (output14 to 21) : ?1.5 ma (v disp = 9.5v) segment driver (output22 to 33) : ?6.0 ma (v disp = 9.5v) ? data transfer speed : 5.0mhz ? package : 44-pin plastic qfp (qfp44-p-910-0.80-2k) ? built-in power on reset circuit block diagram clock output1 output2 output33 gnd c si po-1 po-2 < 34 bit > display data latch po-33 d-33 o-33 d-2 d-1 o-2 o-1 v dd c v disp output32 po-32 d-32 o-32 v dd blank_bar data data out < 33 bit > load enable shift register po-34 < pla > 33x33 matrix < p.o.r > r
fedl9270-01 lapis semiconductor ml9270-xx 2/13 pin configuration (top view) 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 output13 output14 output15 output16 output17 nc output18 output19 output20 output21 output22 output2 output1 clock data v disp blank_bar gnd load enable data out output33 44 43 42 41 40 39 38 37 36 35 34 output12 output11 output10 output9 output8 nc (gnd) output7 12 13 14 15 16 17 18 19 20 21 22 output23 output24 output25 output26 output27 nc (gnd) output28 output29 output30 output31 output32 output6 output5 output4 output3 v dd
fedl9270-01 lapis semiconductor ml9270-xx 3/13 pin description pin symbol type connects to description 32 to 38, 40 to 44, 1 output 1 to 13 11 to 16, 18 to 23 output 22 to 33 o vfd tube anode electrode high voltage driver outputs for driving vfd tube. the driver outputs are in phase with the corresponding latch outputs. the direct connection to the anode of a vfd tube eliminates pull-down resistors. i oh1 > ?1.5 ma 2 to 5, 7 to 10 output 14 to 21 o vfd tube grid electrode high voltage driver outputs for driving vfd tube. the driver outputs are in phase with the corresponding latch outputs. the direct connection to the anode of a vfd tube eliminates pull-down resistors. i oh1 > ?6.0 ma 24 data out o next device serial data output pin of shift register. data in output through the data out pin in synchronization with the clock signal. 28 v dd 29 v disp 26 gnd ? power supply v dd -gnd are power supplies for internal logic. v disp -gnd are power supplies for driving fluorescent tubes. apply v disp after v dd is applied. 25 load enable l micro- controller latch signal input pin of display data latch logic. if the load enable pin is high, the data of the shift register is through. if the load enable pin is low, the data of the shift register does the latch. 27 blank_bar l micro- controller blank_bar input pin with a built-in pull-up resistor. the blank_bar pin is normally being set high. if the blank_bar pin is low, the all driver outputs are ?l? level. 30 data l micro- controller serial data input pin of the shift register. display data (positive logic) is input in through the data pin synchronization with clock. 31 clock l micro- controller shift register clock input pin. shift register reads data through data while the clock pin is low state and the data in the shift register is shifted from one stage to the next stage at the rising edge of the clock.
fedl9270-01 lapis semiconductor ml9270-xx 4/13 absolute maximum ratings parameter symbol condition rating unit supply voltage (1) v dd ? ?0.3 to +6.5 v supply voltage (2) v disp ? ?0.3 to +25 v input voltage v in ? ?0.3 to v dd +0.3 v output voltage (1) v o1 data out ?0.3 to v dd +0.3 v output voltage (2) v o2 output1 to 33 ?0.3 to v disp +0.3 v storage temperature t stg ? ?55 to +150 c power dissipation p d ta < 105c 266 mw l o1 output1 to 13, output 22 to 33 ?18.0 to +2.0 l o2 output 14 to 21 ?4.5 to +2.0 output current i o3 data out ?2.0 to +2.0 ma recommended operating conditions parameter symbol condition min. typ. max. unit when the power supply voltage is 5.0 v (typ.) 4.5 5.0 5.5 v supply voltage (1) v dd when the power supply voltage is 3.3 v (typ.) 3.0 3.3 3.6 v supply voltage (2) v disp ? 8 ? 18 v clock frequency f clk ? ? ? 5.0 mhz operating temperature ta ? ?40 ? +105 c
fedl9270-01 lapis semiconductor ml9270-xx 5/13 electrical characteristics dc characteristics (v dd = 5.0 v ? 10% or 3.3 v ? 10%, v disp = 8 to 18 v, f clk = 5.0 mhz, ta = ?40 to +105c, unless otherwise specified) parameter symbol applied pin condition min. typ. max. unit v dd = 5.0 v ? 10 % 0.7 v dd ? ? v high level input voltage v ih all inputs v dd = 3.3 v ? 10 % 0.8 v dd ? ? v v dd = 5.0 v ? 10 % ? ? 0.3 v dd v low level input voltage v il all inputs v dd = 3.3 v ? 10 % ? ? 0.2 v dd v i ih1 *1 v ih = v dd ?1.0 ? +1.0 ? a high level input current i ih2 blank_bar v ih = v dd ?1.0 ? +1.0 ? a i il1 *1 v il = 0.0 v ?1.0 ? +1.0 ? a v dd = 5.0 v, v il = 0.0 v ?120 ?75 ?30 ? a ? low level input current i il2 blank_bar *4 v dd = 3.3 v, v il = 0.0 v ?60 ?38 ?15 ? a ? v oh1 *2 v disp = 9.5 v, i oh1 = ?6.0 ma v disp ?0.5 ? ? v v oh2 *3 v disp = 9.5 v, i oh2 = ?1.5 ma v disp ?0.5 ? ? v v dd = 5.0 v, i oh3 = ?500 ua v dd ?0.4 ? ? v high level output voltage v oh3 data out v dd = 3.3 v, i oh3 = ?500 ua v dd ?0.3 ? ? v v ol1 *2, *3 v disp = 9.5 v, i ol1 = 500 ua ? ? 2.0 v v dd = 5.0 v, i ol2 = 500 ua ? ? 0.4 v low level output voltage v ol2 data out v dd = 3.3 v, i ol2 = 500 ua ? ? 0.3 v v dd = 5.0 v ? 10 % input data = ?1?0?1?.. ? ? 2.5 ma i dd v dd v dd = 3.3 v ? 10 % input data = ?1?0?1?.. ? ? 2.0 ma supply current (1) (dynamic mode) i disp v disp input data = ?1?0?1?.. ? ? 0.5 ma i dds v dd ? 1.0 10.0 ? a supply current (2) (static mode) i disps v disp no operation, typ.: ta = 25c , max.:ta = 85c ? 1.0 20.0 ? a *1 : data, clock, load enable terminals. * 2 : output1 to 13, output22 to 33 terminals. * 3 : output14 to 21 terminals. *4 : to blank_bar input, the low level driver capability more than 600ua should be set.
fedl9270-01 lapis semiconductor ml9270-xx 6/13 ac characteristics (v dd = 5.0 v ? 10% or 3.3 v ? 10%, v disp = 8 to 18 v, f clk = 5.0 mhz, ta = ?40 to +105c, unless otherwise specified) parameter symbol condition min. typ. max. unit clock pulse width t w (clk) ? 100 ? ? ns data setup time t su (d-clk) ? 50 ? ? ns data hold time t h (clk-d) ? 50 ? ? ns clock - load enable setup time t su (clk-lat) ? 50 ? ? ns load enable - clock setup time t su (lat-clk) normal operation 50 ? ? ns load enable pulse width t w (lat) 400 ? ? ns blank_bar pulse width t w (bk ) 5 ? ? ? s data out delay time t pd c l l = 30 pf ? 25 50 ns t dlh ? 1.0 2.0 ? s ? all output delay time t dhl c l d = 100 pf ? 1.0 2.0 ? s ? t tlh ? 0.5 1.0 ? s all output slew rate t thl c l d = 100 pf t r = 20 to 80% t f = 80 to 20% ? 0.5 1.0 ? s v dd rise time t prz mounted in a unit ? ? 100 ? s v dd off time t pof mounted in a unit, v disp = 0.0 v 5.0 ? ? ms clock wait time t rsoff ? 300 ? ? ? s definition of input voltage symbol v dd = 3.3 v ? 10% v dd = 5.0 v ? 10% v ih / v il 0.8 v dd / 0.2 v dd 0.7 v dd / 0.3 v dd t pof t prz voltage (v dd ) clock t rsoff ? 0.8v dd ? 0.0 v ?vih ? vil
fedl9270-01 lapis semiconductor ml9270-xx 7/13 timing diagrams symbol v dd = 3.3 v ? 10% v dd = 5.0 v ? 10% v ih / v il 0.8 v dd / 0.2 v dd 0.7 v dd / 0.3 v dd 0.8 v disp / 0.2 v disp 0.8 v disp / 0.2 v disp v oh / v ol 0.8 v dd / 0.2 v dd 0.8 v dd / 0.2 v dd clock load enable blank_bar output n data out t su (d-clk) t pd t su (clk- lat ) t su ( lat -clk) t w ( bk ) t w ( bk ) t dlh t dhl t tlh t thl t h (clk-d) 1/f clk t w ( clk ) t pd t w ( lat ) data t w ( clk )
fedl9270-01 lapis semiconductor ml9270-xx 8/13 functional description general description the ml9270 is a cmos multi-digit display driver and consists of a 34-bit shift register, a 33-bit latch, and a 33-bit vf tube driver. pin description (1) data this is a serial data input terminal of the 34-stage shift register. (2) clock this is a clock input terminal of the shift resister to shift an input signal at its leading edge. (3) load enable this is an input terminal to transfer the data from the shift register to the data latch circuit to hold it. after the data is held, the terminal initializes the data of the shift register. these functions are executed at the leading edge of an input signal. (4) blank_bar this is an input terminal to turn all the output terminals off(low), which contains a pull-up resistor. (5) output1 to 33 these are output terminal for the vfd tube driver.each terminal outputs data which is transferd from the corresponding bit of the shift register and held in the data latch circuit. (6) data out this is a data output terminal of the shift register to output data on the last stage of the 34-stage shift register. (7) v dd this is a logic power supply terminal. (8) v disp this is a driver output power supply terminal. (9) gnd this is a grounding terminal.
fedl9270-01 lapis semiconductor ml9270-xx 9/13 shift register numbers (bit numbers) and corresponding output pin names (output numbers)(code 01) register no. 33 32 31 30 29 28 27 26 25 24 23 output no. 33 32 31 30 29 28 27 26 25 24 23 register no. 22 21 20 19 18 17 16 15 14 13 12 output no. 22 21 20 19 18 17 16 15 14 13 12 register no. 11 10 9 8 7 6 5 4 3 2 1 0 output no. 11 10 9 8 7 6 5 4 3 2 1 data out
fedl9270-01 lapis semiconductor ml9270-xx 10/13 power-on/off timing to prevent ic from malfunctioning, after v dd is applied as soon as possible that v disp is applied. when turning off the power, after v disp is applied as soon as possible that v dd is applied. [voltage] [time] v dd terminal voltage v disp terminal voltage v dd >2.0v
fedl9270-01 lapis semiconductor ml9270-xx 11/13 package dimensions qfp44-p-910-0.80-2k package material epoxy resin lead frame material 42 alloy pin treatment sn/pb package weight (g) 0.41 typ. 5 rev. no./last revised 5/nov. 20, 2002 notes for mounting the surface mount type package the surface mount type packages are very susceptible to he at in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact rohm's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). ( unit: mm )
fedl9270-01 lapis semiconductor ml9270-xx 12/13 revision history page document no. date previous edition current edition description pedl9270-01 apr. 14, 2005 ? ? preliminary edition 1 pedl9270-02 jun. 23, 2005 ? ? block diagram: addition of pla block diagram: addition p.o.r blank ? blank power dissipation: tbd ? 266mw timing diagram: reversal of blank signal 1/fc ? f clk pedl9270-03 jun. 28, 2005 ? ? block diagram: addition of schmidt to data ac: addition of tprz,tpof and trsoff ac: addition of por timing dc: addition of restriction to blank power on/off timing: addition of comment pedl9270-04 jun. 30, 2005 ? ? pin configuration: n.c ? n.c(gnd) ac: deleted of all output delay time condition 1, 2, 3, 5, 6 and 7 1, 2, 3, 5, 6 and 7 changed the pin name from blank to blank_bar. ? 9 added two sections. ? ? 11 added the ?package dimensions? section. fedl9270-01 sep. 1, 2005 6 changed the load-enable pulse width to 400ns.
fedl9270-01 lapis semiconductor ml9270-xx 13/13 notice no copying or reproduction of this document, in part or in whole, is permitted without the consent of lapis semiconductor co., ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing lapis semiconductor's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specifications, which can be obtained from lapis semiconductor upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, lapis semiconductor shall bear no responsibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circuits for the products. lapis semiconductor does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by lapis semiconductor and other parties. lapis semiconductor shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-a utomation equipment, communication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while lapis semiconductor always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe designs. lapis semiconductor shall bear no responsibility whatsoever for your use of any product outside of the pr escribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a me dical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). lapis semiconductor shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law. copyright 2005 - 2011 lapis semiconductor co., ltd.

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